http://www.mentor.com/dsm/
IKOS
HP
Click here for EDAToolsCafe Click here for EDAToolsCafe Click here for Internet Business Systems Click here for Hewlett Packard Click here for EDAToolsCafe
Search:
  Home | EDAVision | Companies | Downloads | Interviews | Forums | News | Resources |  ItZnewz  | |   | PCBCafe
  Check Mail | Submit Material | Universities | Books & Courses | Events | Membership | Fun Stuff | Advertise |
 Browse eCatalog:  Subscribe to EDA Daily News
eCatalogAsic & ICPCBFPGADesign ServicesHardwareSIP
Email: 
 EDAToolsCafe 

Printer Friendly Version

Toshiba Enters U.S. Automotive Market With Cost-Effective Single Chip Solution For Car Information Systems

Highly Integrated 32-bit MIPS-based Processor Is First to Combine Graphics Display Controller, SDRAM Controller and Dual CAN Channels

SAN JOSE, Calif., Jan. 14 /PRNewswire/ -- Toshiba America Electronic Components, Inc. (TAEC) today announced availability of a new 32-bit MIPS(TM)-based microprocessor (MPU) targeted at automotive information display applications such as instrument clusters, dashboard graphics and navigation systems. This move marks TAEC's entry into the microprocessor segment of the U.S. automotive market; follow-on products are planned. Designated the TMPR3916F, the new chip integrates a dedicated graphics display controller, controller area network (CAN) modules and peripherals to enable compact, cost-optimized system solutions with superior graphics performance. Samples will be available in March 2002 at $20 in 10,000 piece quantities.

"Our targeted medium size thin film transistor liquid crystal display automotive applications require a highly integrated, cost-effective solution not previously obtainable. Accordingly, we took a single chip approach and architected the TMPR3916F to minimize total system cost, including memory, and reduce development time," said Tetsuro Wada, director, business development, of TAEC's MPU Business Unit. "A single external DRAM in a x32 configuration supplies all necessary graphics buffer and main memory," he continued. The unified memory architecture provides the central processing unit (CPU) with direct access to the display memory and realizes high performance graphics operations, including flexibility for drawing and rendering functions. The four-layer graphics concept provides transparency and smooth scrolling functions. Along with a built-in synchronous dynamic random access memory (SDRAM) controller and serial communications interfaces, the integrated two channels of CAN support direct automotive networking.

Compared to its predecessor, TMPR3903AF, the new MPU offers higher performance at 60 megahertz, an extended graphics function with 256 color planes compared to 16, popular SDRAM support instead of extended data output (EDO)-DRAM support and integrated CAN modules.

Technical Details

Operating at 60 megahertz maximum operating frequency with a 3.3 volt (V) power supply and 5V tolerant I/O, the Toshiba TX39/H microprocessor reduced instruction set computer (RISC) core is based on the MIPS R3000A architecture. Its on-chip instruction cache is four kilobytes (KB) and data cache is one KB. Maximum power dissipation is 1,200 milliwatts and the operating ambient temperature range is -40 degrees to 85 degrees Centigrade. The unified memory architecture has a high performance, dual bus structure with a video bus and a CPU bus.

External to the memory core, the chip's integrated memory controller consists of two modules, the SDRAM controller and the memory controller for static random access memory, read only memory and Flash memory; six multi-purpose memory channels are supported. The graphics display controller features four-layer overlay hardware processing with transparent color and has a 16-bit color palette of 544 colors. The CAN-bus controller is fully compliant with the CAN 2.0B active standard and has two channels with 16 mailboxes each. It operates at speeds up to one megabit per second, ensuring compatibility in both standard frame (11 bit) and extended frame (19 bit) identifiers. Other peripheral controllers include a two-channel direct memory access controller, an interrupt controller with three external interrupts and one non-maskable interrupt, serial input output controllers (four channels of universal asynchronous receiver-transmitter and one channel of serial peripheral interface-compatible TX serial extension interface) and a one-channel timer.

A built-in debugging support unit enables setting various breakpoints and performing real-time analysis. A full suite of TX39 standard software development tools are offered. Currently, the OSEK and VxWorks operating systems (OS) are supported with other popular OS support under development.

Package

Manufactured using Toshiba's proven 0.35um CMOS process, the TMPR3916F is housed in a 208-pin quad flat pack that is 28 millimeters (mm) by 28mm with a 0.5mm pitch.

Schedule and Pricing

The TMPR3916F is scheduled to sample in March 2002 at $20 in 10,000 piece quantities. Mass production at Toshiba's Iwate, Japan fabrication facility is slated for October 2002 with an initial production run of 100,000 pieces per month.

Drawing Upon Toshiba's Global Automotive Strength

The TMPR3916F was developed by an engineering team at Toshiba's European LSI Design & Engineering Centre (ELDEC) located in Dusseldorf, Germany in cooperation with the Japanese design team who designed its predecessor, the TMPR3903AF. A custom navigation system design for a European customer based on the same 0.35um technology and CPU core as the TMPR3916F has been in mass production since 1999. The TMPR3903AF was first developed in Japan in 1995 as a navigation system controller for a leading Japanese customer and subsequently used in a similar application in the U.S.

About TAEC

TAEC offers the industry's broadest line-up of semiconductor, display and storage solutions for the computing, wireless, networking and digital consumer markets. Combining quality and flexibility with design engineering expertise, TAEC brings advanced next-generation technologies to its OEM customers. TAEC is an independent operating company owned by Toshiba America Inc., a subsidiary of the $47.9 billion (FY 2000 recorded sales) Toshiba Corporation, the second largest semiconductor company worldwide in terms of global sales for the year 2000. Toshiba is a world leader in high-technology products with more than 300 major subsidiaries and affiliates worldwide. For additional company and product information, please visit TAEC's web site at www.chips.toshiba.com .

For further information, please contact Deborah Chalmers of Toshiba America Electronics Components, Inc., +1-408-526-2454, deborah.chalmers@taec.toshiba.com; or Agency, Judy Kahn, +1-650-948-8881, judygkahn@msn.com, for Toshiba America Electronics Components, Inc.

http://www.mentor.com/hdl_design/
http://www.mentor.com/dft/
http://www.mentor.com/pcb/
http://www.mentor.com/dsm/
Sign up for a chance to win HP Jornada


Click here for Internet Business Systems Copyright 2002, Internet Business Systems, Inc.
1-888-44-WEB-44 --- marketing@ibsystems.com